CA9541AMR / CA9541BMR is a low-voltage 2-to-1 I²C/SMBus master selector designed for dual-master architectures where system reliability and redundancy are essential. The device allows two independent masters to access the same downstream slave devices while ensuring that only one master controls the bus at any given time. The inactive or faulty master is electrically isolated, preventing it from disrupting bus communication.

Two variants are available:

• CA9541A – no channel selected at power-up,
• CA9541B – channel 0 selected at power-up.

The device integrates interrupt logic, including INT_IN for downstream propagation and INT0/INT1 outputs to signal bus ownership changes or completion of the bus initialization sequence. When enabled, the bus recovery function sends nine SCL pulses, a NACK, and a STOP condition to reset downstream devices before switching control to the selected master.

The CA9541 supports voltage-level translation via external pull-ups, is tolerant up to 6.0 V on all I/O pins, supports hot insertion, and includes noise filtering and reset logic. Ideal for server, telecom, and dual-OS wearable applications.