Specification:

• JEDEC Standard 260-pin Small Outline Dual In-Line Memory Module
• Intend for PC4-2933  applications
• Inputs and Outputs are SSTL-12 compatible
• VDD=VDDQ= 1.2 Volt (1.14V~1.26V)
• VPP=2.5 Volt (2.375V~2.75V)
• VDDSPD=2.2-3.6V
• Low-Power auto self-refresh (LPASR)
• SDRAMs have 16 internal banks for concurrent operation (4 Bank Group of 4 banks each)
• Normal and Dynamic On-Die Termination for data, strobe and mask signals.
• Data bus inversion (DBI) for data bus
• Fixed burst chop (BC) of 4 and burst length (BL) of 8 via the MRS
• Selectable BC4 or BL8 on-the fly (OTF)
• Golden connector
• Fly-By topology
• Terminated control, command and address bus
• Programmable /CAS Latency: 10,11,12,13,14,15,16,17,18,19,20,2
• Operation temperature: 0℃~85℃
• On-die VREFDQ generation and Calibration
• On-Board EEPROM
• RoHS and Halogen free